Semi-Custom High-Speed Datapath Design Using Commericial ASIC Design Tools

A semi-custom high-speed datapath design flow is described using commercial ASIC design CAD tools interacting with a simple hierarchical placement Matlab code. The flow leverages the vast automation and verification capabilities of ASIC design CAD tools, while providing a precision close to a fully custom-designed circuit. The methodology is applied to the design of a 4channel, 3-GHz per-channel, digital equalizer for multitone high-speed backplane serial link applications. Each equalizer channel is a 16-tap, 10-bits per tap, linear FIR filter. The design is in a 90-nm CMOS technology and runs with a 1.5-GHz clock.